Gartner Research

Market Trends: Worldwide, ASIC and ASSP Design Starts Continue Declining Trend, 2012

Published: 27 February 2012

ID: G00229088

Analyst(s): Ganesh Ramamoorthy , Bryan Lewis

Summary

The rising cost of designing in leading-edge process nodes has slowed growth in 45- and 32-nanometer designs starts in 2011. On the other hand, design starts in 90 nm and 65 nm are holding up firmly.

Table Of Contents
  • Overview

Trends in the Market

  • Overall ASIC and ASSP Design Starts Continue to Decline
    • Key Highlights
    • Inference
  • ASIC Design Value, Complexity and Production Units Are Growing
    • Key Highlights
    • Inference

Market: Overall ASIC and ASSP Design Starts Set to Decline 2.9% Through 2016

  • Design Starts by Device Type
    • Key Highlights
    • Inference
  • Design Starts by Electronic Equipment Market
    • Key Highlights
    • Inference

Regions: Asia/Pacific's Share of Total Design Starts Continues to Grow

Technology: Leading-Edge Design Start Growth Slows as 90 and 65 nm Designs Hold Steady

Contrarian View: ASIC and ASSP Design Starts Slow; FPGA/PLD Design Starts Set to Grow in 2012 and 2013

Vendors to Watch

Conclusions

Recommended Reading

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