Information Technology

Gartner Glossary


NAND flash is nonvolatile memory with multiple floating gates or charge-trapping transistors. Several transistors are connected, and the binary value is controlled by bit line and word line. NAND flash has been migrated from a 2D to a 3D structure to meet the requirement for high bit density. NAND flash can have several bits per cell, which add greater density but with drawbacks in endurance and/or performance:

  • SLC: Single-level cell
  • MLC: Multilevel cell (2 bits per cell)
  • TLC: 3 bits per cell
  • QLC: 4 bits per cell

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